move dmx2 -> dmx

This commit is contained in:
Jörn-Michael Miehe 2024-03-25 00:37:47 +00:00
parent 08db62f4f9
commit 28f3f9f355
3 changed files with 123 additions and 181 deletions

View file

@ -1,57 +1,142 @@
use cortex_m::singleton; use stm32f1xx_hal::{afio, dma, gpio, pac, prelude::*, rcc, serial};
use stm32f1xx_hal::{dma, pac, prelude::*, rcc, serial};
const DMX_LEN_MAX: usize = 512;
type TxDma = dma::TxDma<serial::Tx<pac::USART1>, dma::dma1::C4>; type TxDma = dma::TxDma<serial::Tx<pac::USART1>, dma::dma1::C4>;
type DMXUniverse<const DMX_LEN: usize> = &'static mut [u8; DMX_LEN]; type DMXUniverse<const DMX_LEN: usize> = &'static mut [u8; DMX_LEN];
type DMXTransfer<const DMX_LEN: usize> = dma::Transfer<dma::R, DMXUniverse<DMX_LEN>, TxDma>; type DMXTransfer<const DMX_LEN: usize> = dma::Transfer<dma::R, DMXUniverse<DMX_LEN>, TxDma>;
pub enum DMX<const DMX_LEN: usize = DMX_LEN_MAX> { struct TxDMAIdle<const DMX_LEN: usize> {
Idle(Option<TxDma>, Option<DMXUniverse<DMX_LEN>>), tx: TxDma,
Busy(Option<DMXTransfer<DMX_LEN>>), buffer: DMXUniverse<DMX_LEN>,
}
struct TxDMABusy<const DMX_LEN: usize> {
transfer: DMXTransfer<DMX_LEN>,
}
enum TxDMA<const DMX_LEN: usize> {
Idle(Option<TxDMAIdle<DMX_LEN>>),
Busy(Option<TxDMABusy<DMX_LEN>>),
}
impl<const DMX_LEN: usize> TxDMA<DMX_LEN> {
fn new(tx: TxDma, buffer: DMXUniverse<DMX_LEN>) -> Self {
TxDMA::Idle(Some(TxDMAIdle { tx, buffer }))
}
fn start_sending(&mut self, tx_universe: &[u8]) {
let TxDMA::Idle(idle) = self else {
return;
};
let Some(TxDMAIdle { tx, buffer }) = idle.take() else {
panic!();
};
buffer.copy_from_slice(tx_universe);
*self = TxDMA::Busy(Some(TxDMABusy {
transfer: tx.write(buffer),
}));
}
fn wait(&mut self) {
let TxDMA::Busy(busy) = self else {
return;
};
let Some(TxDMABusy { transfer }) = busy.take() else {
panic!();
};
let (buffer, tx) = transfer.wait();
*self = TxDMA::Idle(Some(TxDMAIdle { tx, buffer }));
}
fn is_idle(&mut self) -> bool {
match self {
TxDMA::Idle(_) => true,
TxDMA::Busy(busy) => {
let Some(TxDMABusy { transfer }) = busy.take() else {
panic!();
};
let is_done = transfer.is_done();
busy.replace(TxDMABusy { transfer });
if is_done {
self.wait();
}
is_done
}
}
}
}
#[allow(clippy::upper_case_acronyms)]
pub struct DMX<const DMX_LEN: usize> {
tx_universe: DMXUniverse<DMX_LEN>,
sender: TxDMA<DMX_LEN>,
} }
impl<const DMX_LEN: usize> DMX<DMX_LEN> { impl<const DMX_LEN: usize> DMX<DMX_LEN> {
pub fn new<PINS>( pub fn new(
mut serial: serial::Serial<pac::USART1, PINS>, mem: &'static mut [u8],
channel: dma::dma1::C4, mut dma_channel: dma::dma1::C4,
pa9: gpio::PA9,
pa10: gpio::PA10,
acrh: &mut gpio::Cr<'A', true>,
mapr: &mut afio::MAPR,
clocks: &rcc::Clocks, clocks: &rcc::Clocks,
) -> Self ) -> Self {
where // use provided memory region
PINS: serial::Pins<pac::USART1>, assert!(mem.len() >= DMX_LEN * 2);
{
assert!(DMX_LEN <= DMX_LEN_MAX);
serial.reconfigure(250_000.bps(), &clocks).unwrap(); let (tx_universe, tx_buffer) = {
let (tx_universe, rest) = mem.split_at_mut(DMX_LEN);
let (tx_buffer, _) = rest.split_at_mut(DMX_LEN);
Self::Idle(Some(serial.tx.with_dma(channel)), None) let tx_universe: DMXUniverse<DMX_LEN> = tx_universe.try_into().unwrap();
} let tx_buffer: DMXUniverse<DMX_LEN> = tx_buffer.try_into().unwrap();
pub fn send(&mut self, data: &[u8]) { (tx_universe, tx_buffer)
if let Self::Busy(_) = self {
self.wait();
}
let Self::Idle(tx, txbuffer) = self else {
panic!("Broken DMX State!")
}; };
let txbuffer = txbuffer.take().unwrap_or_else(|| { // setup DMA1_CHANNEL4 interrupt on TransferComplete
let foo = singleton!(: [u8; DMX_LEN_MAX] = [0u8; DMX_LEN_MAX]).unwrap(); dma_channel.listen(dma::Event::TransferComplete);
(&mut foo[..DMX_LEN]).try_into().unwrap() unsafe {
}); pac::CorePeripherals::steal()
let tx = tx.take().unwrap(); .NVIC
.set_priority(pac::Interrupt::DMA1_CHANNEL4, 1);
}
txbuffer.copy_from_slice(&data[..DMX_LEN]); // Serial config
*self = Self::Busy(Some(tx.write(txbuffer))); let serial = serial::Serial::new(
unsafe { pac::Peripherals::steal() }.USART1,
(
pa9.into_alternate_open_drain(acrh),
pa10, //.into_pull_up_input(acrh),
),
mapr,
250_000.bps(),
clocks,
);
Self {
tx_universe,
sender: TxDMA::new(serial.tx.with_dma(dma_channel), tx_buffer),
}
} }
pub fn wait(&mut self) { pub fn start_tx(&mut self) {
let Self::Busy(xfer) = self else { return }; self.sender.start_sending(self.tx_universe);
}
let xfer = xfer.take().unwrap(); pub fn wait_tx(&mut self) {
let (txbuffer, tx) = xfer.wait(); self.sender.wait();
}
*self = Self::Idle(Some(tx), Some(txbuffer)); pub fn tx_is_idle(&mut self) -> bool {
self.sender.is_idle()
} }
} }

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@ -1,142 +0,0 @@
use stm32f1xx_hal::{afio, dma, gpio, pac, prelude::*, rcc, serial};
type TxDma = dma::TxDma<serial::Tx<pac::USART1>, dma::dma1::C4>;
type DMXUniverse<const DMX_LEN: usize> = &'static mut [u8; DMX_LEN];
type DMXTransfer<const DMX_LEN: usize> = dma::Transfer<dma::R, DMXUniverse<DMX_LEN>, TxDma>;
struct TxDMAIdle<const DMX_LEN: usize> {
tx: TxDma,
buffer: DMXUniverse<DMX_LEN>,
}
struct TxDMABusy<const DMX_LEN: usize> {
transfer: DMXTransfer<DMX_LEN>,
}
enum TxDMA<const DMX_LEN: usize> {
Idle(Option<TxDMAIdle<DMX_LEN>>),
Busy(Option<TxDMABusy<DMX_LEN>>),
}
impl<const DMX_LEN: usize> TxDMA<DMX_LEN> {
fn new(tx: TxDma, buffer: DMXUniverse<DMX_LEN>) -> Self {
TxDMA::Idle(Some(TxDMAIdle { tx, buffer }))
}
fn start_sending(&mut self, tx_universe: &[u8]) {
let TxDMA::Idle(idle) = self else {
return;
};
let Some(TxDMAIdle { tx, buffer }) = idle.take() else {
panic!();
};
buffer.copy_from_slice(tx_universe);
*self = TxDMA::Busy(Some(TxDMABusy {
transfer: tx.write(buffer),
}));
}
fn wait(&mut self) {
let TxDMA::Busy(busy) = self else {
return;
};
let Some(TxDMABusy { transfer }) = busy.take() else {
panic!();
};
let (buffer, tx) = transfer.wait();
*self = TxDMA::Idle(Some(TxDMAIdle { tx, buffer }));
}
fn is_idle(&mut self) -> bool {
match self {
TxDMA::Idle(_) => true,
TxDMA::Busy(busy) => {
let Some(TxDMABusy { transfer }) = busy.take() else {
panic!();
};
let is_done = transfer.is_done();
busy.replace(TxDMABusy { transfer });
if is_done {
self.wait();
}
is_done
}
}
}
}
#[allow(clippy::upper_case_acronyms)]
pub struct DMX<const DMX_LEN: usize> {
tx_universe: DMXUniverse<DMX_LEN>,
sender: TxDMA<DMX_LEN>,
}
impl<const DMX_LEN: usize> DMX<DMX_LEN> {
pub fn new(
mem: &'static mut [u8],
mut dma_channel: dma::dma1::C4,
pa9: gpio::PA9,
pa10: gpio::PA10,
acrh: &mut gpio::Cr<'A', true>,
mapr: &mut afio::MAPR,
clocks: &rcc::Clocks,
) -> Self {
// use provided memory region
assert!(mem.len() >= DMX_LEN * 2);
let (tx_universe, tx_buffer) = {
let (tx_universe, rest) = mem.split_at_mut(DMX_LEN);
let (tx_buffer, _) = rest.split_at_mut(DMX_LEN);
let tx_universe: DMXUniverse<DMX_LEN> = tx_universe.try_into().unwrap();
let tx_buffer: DMXUniverse<DMX_LEN> = tx_buffer.try_into().unwrap();
(tx_universe, tx_buffer)
};
// setup DMA1_CHANNEL4 interrupt on TransferComplete
dma_channel.listen(dma::Event::TransferComplete);
unsafe {
pac::CorePeripherals::steal()
.NVIC
.set_priority(pac::Interrupt::DMA1_CHANNEL4, 1);
}
// Serial config
let serial = serial::Serial::new(
unsafe { pac::Peripherals::steal() }.USART1,
(
pa9.into_alternate_open_drain(acrh),
pa10, //.into_pull_up_input(acrh),
),
mapr,
250_000.bps(),
clocks,
);
Self {
tx_universe,
sender: TxDMA::new(serial.tx.with_dma(dma_channel), tx_buffer),
}
}
pub fn start_tx(&mut self) {
self.sender.start_sending(self.tx_universe);
}
pub fn wait_tx(&mut self) {
self.sender.wait();
}
pub fn tx_is_idle(&mut self) -> bool {
self.sender.is_idle()
}
}

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@ -4,15 +4,14 @@
// mod i2c_reg_slave; // mod i2c_reg_slave;
// mod i2c_slave; // mod i2c_slave;
// mod dmx; mod dmx;
mod dmx2;
// extern crate panic_halt; // extern crate panic_halt;
extern crate panic_semihosting; extern crate panic_semihosting;
#[rtic::app(device = stm32f1xx_hal::pac, dispatchers = [SPI1, SPI2, SPI3])] #[rtic::app(device = stm32f1xx_hal::pac, dispatchers = [SPI1, SPI2, SPI3])]
mod app { mod app {
use crate::dmx2::DMX; use crate::dmx::DMX;
use stm32f1xx_hal::{ use stm32f1xx_hal::{
gpio::{self, ExtiPin}, gpio::{self, ExtiPin},
pac, pac,