module "dmx2"

bluepill-rs/src/dmx2.rs

@@ -0,0 +1,79 @@
+use stm32f1xx_hal::{dma, pac, prelude::*, serial};
+
+type TxDma = dma::TxDma<serial::Tx<pac::USART1>, dma::dma1::C4>;
+type DMXUniverse<const DMX_LEN: usize> = &'static mut [u8; DMX_LEN];
+type DMXTransfer<const DMX_LEN: usize> = dma::Transfer<dma::R, DMXUniverse<DMX_LEN>, TxDma>;
+
+struct TxDMAIdle<const DMX_LEN: usize> {
+    dma: Option<dma::TxDma<serial::Tx<pac::USART1>, dma::dma1::C4>>,
+    buffer: Option<DMXUniverse<DMX_LEN>>,
+}
+
+struct TxDMABusy<const DMX_LEN: usize> {
+    transfer: Option<DMXTransfer<DMX_LEN>>,
+}
+
+enum TxDMA<const DMX_LEN: usize> {
+    Idle(TxDMAIdle<DMX_LEN>),
+    Busy(TxDMABusy<DMX_LEN>),
+}
+
+pub struct DMX<const DMX_LEN: usize> {
+    tx_universe: Option<DMXUniverse<DMX_LEN>>,
+    sender: TxDMA<DMX_LEN>,
+}
+
+impl<const DMX_LEN: usize> DMX<DMX_LEN> {
+    pub fn new<PINS>(mem: &'static mut [u8]) -> Self {
+        // use provided memory region
+        assert!(mem.len() >= DMX_LEN * 2);
+
+        let (tx_universe, tx_buffer) = {
+            let (left1, rest) = mem.split_at_mut(DMX_LEN);
+            let (left2, _) = rest.split_at_mut(DMX_LEN);
+
+            let tx_universe: &mut [u8; DMX_LEN] = left1.try_into().unwrap();
+            let tx_buffer: &mut [u8; DMX_LEN] = left2.try_into().unwrap();
+
+            (tx_universe, tx_buffer)
+        };
+
+        // Peripherals
+        let dp = unsafe { pac::Peripherals::steal() };
+        let mut cp = unsafe { pac::CorePeripherals::steal() };
+
+        let clocks = dp
+            .RCC
+            .constrain()
+            .cfgr
+            .freeze(&mut dp.FLASH.constrain().acr);
+
+        let mut gpioa = dp.GPIOA.split();
+        let mut afio = dp.AFIO.constrain();
+        let mut dma1 = dp.DMA1.split();
+
+        // setup DMA1_CHANNEL4 interrupt on TransferComplete
+        dma1.4.listen(dma::Event::TransferComplete);
+        unsafe { cp.NVIC.set_priority(pac::Interrupt::DMA1_CHANNEL4, 1) };
+
+        // Serial config
+        let serial = serial::Serial::new(
+            dp.USART1,
+            (
+                gpioa.pa9.into_alternate_open_drain(&mut gpioa.crh),
+                gpioa.pa10, //.into_pull_up_input(&mut gpioa.crh),
+            ),
+            &mut afio.mapr,
+            250_000.bps(),
+            &clocks,
+        );
+
+        Self {
+            tx_universe: Some(tx_universe),
+            sender: TxDMA::Idle(TxDMAIdle {
+                dma: Some(serial.tx.with_dma(dma1.4)),
+                buffer: Some(tx_buffer),
+            }),
+        }
+    }
+}

bluepill-rs/src/main.rs

@@ -5,6 +5,7 @@
 // mod i2c_reg_slave;
 // mod i2c_slave;
 mod dmx;
+mod dmx2;
 
 // extern crate panic_halt;
 extern crate panic_semihosting;