DMX as enum
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340c5c3fb2
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2 changed files with 38 additions and 22 deletions
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@ -1,46 +1,60 @@
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#![allow(unsafe_code)]
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use cortex_m::singleton;
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use stm32f1xx_hal::{afio, dma, gpio, pac, prelude::*, rcc, serial};
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use stm32f1xx_hal::{afio, dma, pac, prelude::*, rcc, serial};
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pub struct DMX {
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tx: Option<dma::TxDma<serial::Tx<pac::USART1>, dma::dma1::C4>>,
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type _TxDma = dma::TxDma<serial::Tx<pac::USART1>, dma::dma1::C4>;
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pub struct DMXIdle {
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tx: Option<_TxDma>,
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txbuffer: Option<&'static mut [u8; 512]>,
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}
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pub enum DMX {
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Idle(DMXIdle),
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Busy(Option<dma::Transfer<dma::R, &'static mut [u8; 512], _TxDma>>),
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}
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impl DMX {
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pub fn new(
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pub fn new<PINS>(
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usart: pac::USART1,
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pins: (
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gpio::Pin<'A', 9, gpio::Alternate<gpio::OpenDrain>>,
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gpio::Pin<'A', 10>,
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),
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pins: PINS,
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mapr: &mut afio::MAPR,
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channel: dma::dma1::C4,
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clocks: &rcc::Clocks,
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) -> Self {
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) -> Self
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where
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PINS: serial::Pins<pac::USART1>,
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{
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// Serial config
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let serial = serial::Serial::new(usart, pins, mapr, 250_000.bps(), &clocks);
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Self {
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Self::Idle(DMXIdle {
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tx: Some(serial.tx.with_dma(channel)),
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txbuffer: None,
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}
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})
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}
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pub fn send(&mut self, data: &[u8; 512]) {
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if let Some(mut tx) = self.tx.take() {
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let mut txbuffer = match self.txbuffer.take() {
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Some(buf) => buf,
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None => singleton!(: [u8; 512] = [0; 512]).unwrap(),
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};
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if let Self::Idle(idle) = self {
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let txbuffer = idle
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.txbuffer
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.take()
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.unwrap_or_else(|| singleton!(: [u8; 512] = [0; 512]).unwrap());
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let tx = idle.tx.take().unwrap();
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txbuffer.copy_from_slice(data);
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let xfer = tx.write(txbuffer);
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*self = Self::Busy(Some(tx.write(txbuffer)))
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}
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}
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(txbuffer, tx) = xfer.wait();
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self.tx.replace(tx);
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self.txbuffer.replace(txbuffer);
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pub fn wait(&mut self) {
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if let Self::Busy(xfer) = self {
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let xfer = xfer.take().unwrap();
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let (txbuffer, tx) = xfer.wait();
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*self = Self::Idle(DMXIdle {
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tx: Some(tx),
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txbuffer: Some(txbuffer),
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});
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}
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}
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}
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@ -100,6 +100,8 @@ mod app {
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cx.local.delay_us.delay(1.secs());
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cx.local.led.set_low();
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cx.local.dmx.wait();
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}
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}
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}
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