From fc94b6186adecb84b6ef0cb3bc9d60b2027fb7b4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=C3=B6rn-Michael=20Miehe?= Date: Thu, 29 Feb 2024 20:29:54 +0000 Subject: [PATCH] serial dma TX --- src/main.rs | 33 +++++++++++++++++++++++++++++++-- 1 file changed, 31 insertions(+), 2 deletions(-) diff --git a/src/main.rs b/src/main.rs index c44adca..1b33e23 100644 --- a/src/main.rs +++ b/src/main.rs @@ -9,12 +9,13 @@ #![no_std] #![no_main] +use cortex_m::singleton; use panic_halt as _; use nb::block; use cortex_m_rt::entry; -use stm32f1xx_hal::{pac, prelude::*, rcc::Config, timer::Timer}; +use stm32f1xx_hal::{pac, prelude::*, rcc, serial, timer::Timer}; #[entry] fn main() -> ! { @@ -31,7 +32,7 @@ fn main() -> ! { // Freeze the configuration of all the clocks in the system and store the frozen frequencies in // `clocks` let clocks = rcc.cfgr.freeze_with_config( - Config { + rcc::Config { // HSE frequency hse: Some(8_000_000), // PLLMUL represented by an integer -2 @@ -46,8 +47,36 @@ fn main() -> ! { ); // Acquire the GPIOC peripheral + let mut gpioa = dp.GPIOA.split(); let mut gpioc = dp.GPIOC.split(); + let mut afio = dp.AFIO.constrain(); + let dma1 = dp.DMA1.split(); + + // USART1 + let tx = gpioa.pa9.into_alternate_push_pull(&mut gpioa.crh); + let rx = gpioa.pa10; //.into_pull_up_input(&mut gpioa.crh); + + let serial = serial::Serial::new( + dp.USART1, + (tx, rx), + &mut afio.mapr, + serial::Config { + baudrate: 9_600.bps(), + ..Default::default() + }, + &clocks, + ); + + let tx = serial.tx.with_dma(dma1.4); + let buf = singleton!(: [u8; 255] = [0b01010101; 255]).unwrap(); + + let xfer = tx.write(buf); + while !xfer.is_done() {} + + // while circ_buffer.readable_half().unwrap() != dma::Half::First {} + // let _first_half = circ_buffer.peek(|half, _| *half).unwrap(); + // Configure gpio C pin 13 as a push-pull output. The `crh` register is passed to the function // in order to configure the port. For pins 0-7, crl should be passed instead. let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh);