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98d4d3a715
...
30858b66f5
3 changed files with 146 additions and 141 deletions
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@ -1,143 +1,57 @@
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use stm32f1xx_hal::{afio, dma, gpio, pac, prelude::*, rcc, serial};
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use cortex_m::singleton;
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use stm32f1xx_hal::{dma, pac, prelude::*, rcc, serial};
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const DMX_LEN_MAX: usize = 512;
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type TxDma = dma::TxDma<serial::Tx<pac::USART1>, dma::dma1::C4>;
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type TxDma = dma::TxDma<serial::Tx<pac::USART1>, dma::dma1::C4>;
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type DMXUniverse<const DMX_LEN: usize> = &'static mut [u8; DMX_LEN];
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type DMXUniverse<const DMX_LEN: usize> = &'static mut [u8; DMX_LEN];
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type DMXTransfer<const DMX_LEN: usize> = dma::Transfer<dma::R, DMXUniverse<DMX_LEN>, TxDma>;
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type DMXTransfer<const DMX_LEN: usize> = dma::Transfer<dma::R, DMXUniverse<DMX_LEN>, TxDma>;
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struct TxDMAIdle<const DMX_LEN: usize> {
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pub enum DMX<const DMX_LEN: usize = DMX_LEN_MAX> {
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tx: TxDma,
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Idle(Option<TxDma>, Option<DMXUniverse<DMX_LEN>>),
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buffer: DMXUniverse<DMX_LEN>,
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Busy(Option<DMXTransfer<DMX_LEN>>),
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}
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struct TxDMABusy<const DMX_LEN: usize> {
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transfer: DMXTransfer<DMX_LEN>,
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}
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enum TxDMA<const DMX_LEN: usize> {
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Idle(Option<TxDMAIdle<DMX_LEN>>),
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Busy(Option<TxDMABusy<DMX_LEN>>),
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}
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impl<const DMX_LEN: usize> TxDMA<DMX_LEN> {
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fn new(tx: TxDma, buffer: DMXUniverse<DMX_LEN>) -> Self {
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TxDMA::Idle(Some(TxDMAIdle { tx, buffer }))
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}
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fn start_sending(&mut self, tx_universe: &[u8]) {
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let TxDMA::Idle(idle) = self else {
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return;
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};
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let Some(TxDMAIdle { tx, buffer }) = idle.take() else {
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panic!();
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};
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buffer.copy_from_slice(tx_universe);
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*self = TxDMA::Busy(Some(TxDMABusy {
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transfer: tx.write(buffer),
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}));
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}
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fn wait(&mut self) {
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let TxDMA::Busy(busy) = self else {
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return;
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};
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let Some(TxDMABusy { transfer }) = busy.take() else {
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panic!();
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};
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let (buffer, tx) = transfer.wait();
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*self = TxDMA::Idle(Some(TxDMAIdle { tx, buffer }));
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}
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fn is_idle(&mut self) -> bool {
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match self {
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TxDMA::Idle(_) => true,
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TxDMA::Busy(busy) => {
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let Some(TxDMABusy { transfer }) = busy.take() else {
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panic!();
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};
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let is_done = transfer.is_done();
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busy.replace(TxDMABusy { transfer });
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if is_done {
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self.wait();
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}
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is_done
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}
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}
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}
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}
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#[allow(clippy::upper_case_acronyms)]
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pub struct DMX<const DMX_LEN: usize> {
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tx_universe: DMXUniverse<DMX_LEN>,
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sender: TxDMA<DMX_LEN>,
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}
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}
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impl<const DMX_LEN: usize> DMX<DMX_LEN> {
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impl<const DMX_LEN: usize> DMX<DMX_LEN> {
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#[allow(unsafe_code)]
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pub fn new<PINS>(
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pub fn new(
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mut serial: serial::Serial<pac::USART1, PINS>,
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mem: &'static mut [u8],
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channel: dma::dma1::C4,
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mut dma_channel: dma::dma1::C4,
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pa9: gpio::PA9,
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pa10: gpio::PA10,
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acrh: &mut gpio::Cr<'A', true>,
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mapr: &mut afio::MAPR,
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clocks: &rcc::Clocks,
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clocks: &rcc::Clocks,
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) -> Self {
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) -> Self
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// use provided memory region
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where
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assert!(mem.len() >= DMX_LEN * 2);
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PINS: serial::Pins<pac::USART1>,
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{
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assert!(DMX_LEN <= DMX_LEN_MAX);
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let (tx_universe, tx_buffer) = {
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serial.reconfigure(250_000.bps(), &clocks).unwrap();
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let (tx_universe, rest) = mem.split_at_mut(DMX_LEN);
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let (tx_buffer, _) = rest.split_at_mut(DMX_LEN);
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let tx_universe: DMXUniverse<DMX_LEN> = tx_universe.try_into().unwrap();
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Self::Idle(Some(serial.tx.with_dma(channel)), None)
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let tx_buffer: DMXUniverse<DMX_LEN> = tx_buffer.try_into().unwrap();
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}
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(tx_universe, tx_buffer)
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pub fn send(&mut self, data: &[u8]) {
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if let Self::Busy(_) = self {
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self.wait();
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}
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let Self::Idle(tx, txbuffer) = self else {
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panic!("Broken DMX State!")
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};
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};
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// setup DMA1_CHANNEL4 interrupt on TransferComplete
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let txbuffer = txbuffer.take().unwrap_or_else(|| {
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dma_channel.listen(dma::Event::TransferComplete);
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let foo = singleton!(: [u8; DMX_LEN_MAX] = [0u8; DMX_LEN_MAX]).unwrap();
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unsafe {
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(&mut foo[..DMX_LEN]).try_into().unwrap()
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pac::CorePeripherals::steal()
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});
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.NVIC
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let tx = tx.take().unwrap();
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.set_priority(pac::Interrupt::DMA1_CHANNEL4, 1);
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}
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// Serial config
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txbuffer.copy_from_slice(&data[..DMX_LEN]);
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let serial = serial::Serial::new(
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*self = Self::Busy(Some(tx.write(txbuffer)));
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unsafe { pac::Peripherals::steal() }.USART1,
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(
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pa9.into_alternate_open_drain(acrh),
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pa10, //.into_pull_up_input(acrh),
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),
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mapr,
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250_000.bps(),
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clocks,
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);
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Self {
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tx_universe,
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sender: TxDMA::new(serial.tx.with_dma(dma_channel), tx_buffer),
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}
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}
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}
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pub fn start_tx(&mut self) {
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pub fn wait(&mut self) {
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self.sender.start_sending(self.tx_universe);
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let Self::Busy(xfer) = self else { return };
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}
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pub fn wait_tx(&mut self) {
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let xfer = xfer.take().unwrap();
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self.sender.wait();
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let (txbuffer, tx) = xfer.wait();
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}
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pub fn tx_is_idle(&mut self) -> bool {
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*self = Self::Idle(Some(tx), Some(txbuffer));
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self.sender.is_idle()
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}
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}
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}
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}
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79
bluepill-rs/src/dmx2.rs
Normal file
79
bluepill-rs/src/dmx2.rs
Normal file
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@ -0,0 +1,79 @@
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use stm32f1xx_hal::{dma, pac, prelude::*, serial};
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type TxDma = dma::TxDma<serial::Tx<pac::USART1>, dma::dma1::C4>;
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type DMXUniverse<const DMX_LEN: usize> = &'static mut [u8; DMX_LEN];
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type DMXTransfer<const DMX_LEN: usize> = dma::Transfer<dma::R, DMXUniverse<DMX_LEN>, TxDma>;
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struct TxDMAIdle<const DMX_LEN: usize> {
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dma: Option<dma::TxDma<serial::Tx<pac::USART1>, dma::dma1::C4>>,
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buffer: Option<DMXUniverse<DMX_LEN>>,
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}
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struct TxDMABusy<const DMX_LEN: usize> {
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transfer: Option<DMXTransfer<DMX_LEN>>,
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}
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enum TxDMA<const DMX_LEN: usize> {
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Idle(TxDMAIdle<DMX_LEN>),
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Busy(TxDMABusy<DMX_LEN>),
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}
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pub struct DMX<const DMX_LEN: usize> {
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tx_universe: Option<DMXUniverse<DMX_LEN>>,
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sender: TxDMA<DMX_LEN>,
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}
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impl<const DMX_LEN: usize> DMX<DMX_LEN> {
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pub fn new<PINS>(mem: &'static mut [u8]) -> Self {
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// use provided memory region
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assert!(mem.len() >= DMX_LEN * 2);
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let (tx_universe, tx_buffer) = {
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let (left1, rest) = mem.split_at_mut(DMX_LEN);
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let (left2, _) = rest.split_at_mut(DMX_LEN);
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let tx_universe: &mut [u8; DMX_LEN] = left1.try_into().unwrap();
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let tx_buffer: &mut [u8; DMX_LEN] = left2.try_into().unwrap();
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(tx_universe, tx_buffer)
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};
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// Peripherals
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let dp = unsafe { pac::Peripherals::steal() };
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let mut cp = unsafe { pac::CorePeripherals::steal() };
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let clocks = dp
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.RCC
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.constrain()
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.cfgr
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.freeze(&mut dp.FLASH.constrain().acr);
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let mut gpioa = dp.GPIOA.split();
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let mut afio = dp.AFIO.constrain();
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let mut dma1 = dp.DMA1.split();
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// setup DMA1_CHANNEL4 interrupt on TransferComplete
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dma1.4.listen(dma::Event::TransferComplete);
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unsafe { cp.NVIC.set_priority(pac::Interrupt::DMA1_CHANNEL4, 1) };
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// Serial config
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let serial = serial::Serial::new(
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dp.USART1,
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(
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gpioa.pa9.into_alternate_open_drain(&mut gpioa.crh),
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gpioa.pa10, //.into_pull_up_input(&mut gpioa.crh),
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),
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&mut afio.mapr,
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250_000.bps(),
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&clocks,
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);
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Self {
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tx_universe: Some(tx_universe),
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sender: TxDMA::Idle(TxDMAIdle {
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dma: Some(serial.tx.with_dma(dma1.4)),
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buffer: Some(tx_buffer),
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}),
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}
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}
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}
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@ -1,10 +1,11 @@
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#![deny(unsafe_code)]
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// #![deny(unsafe_code)]
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#![no_std]
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#![no_std]
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#![no_main]
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#![no_main]
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// mod i2c_reg_slave;
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// mod i2c_reg_slave;
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// mod i2c_slave;
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// mod i2c_slave;
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mod dmx;
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mod dmx;
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mod dmx2;
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// extern crate panic_halt;
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// extern crate panic_halt;
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extern crate panic_semihosting;
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extern crate panic_semihosting;
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@ -12,11 +13,12 @@ extern crate panic_semihosting;
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#[rtic::app(device = stm32f1xx_hal::pac, dispatchers = [SPI1, SPI2, SPI3])]
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#[rtic::app(device = stm32f1xx_hal::pac, dispatchers = [SPI1, SPI2, SPI3])]
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mod app {
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mod app {
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use crate::dmx::DMX;
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use crate::dmx::DMX;
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use cortex_m::singleton;
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use stm32f1xx_hal::{
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use stm32f1xx_hal::{
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gpio::{self, ExtiPin},
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gpio::{self, ExtiPin},
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pac,
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pac,
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prelude::*,
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prelude::*,
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||||||
timer,
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serial, timer,
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||||||
};
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};
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use systick_monotonic::Systick;
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use systick_monotonic::Systick;
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@ -28,8 +30,9 @@ mod app {
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#[shared]
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#[shared]
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struct Shared {
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struct Shared {
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dmx: DMX<DMX_LEN>,
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buffer: &'static mut [u8],
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delay_us: timer::DelayUs<pac::TIM2>,
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delay_us: timer::DelayUs<pac::TIM2>,
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||||||
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dmx: DMX<DMX_LEN>,
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int_led: gpio::gpiob::PB0<gpio::Output<gpio::OpenDrain>>,
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int_led: gpio::gpiob::PB0<gpio::Output<gpio::OpenDrain>>,
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}
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}
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@ -39,8 +42,7 @@ mod app {
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int_pin: gpio::gpiob::PB10<gpio::Input<gpio::PullUp>>,
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int_pin: gpio::gpiob::PB10<gpio::Input<gpio::PullUp>>,
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}
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}
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#[allow(unsafe_code)]
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#[init]
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#[init(local = [buffer: [u8; DMX_LEN * 2] = [0b0101_0101; DMX_LEN * 2]])]
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||||||
fn init(mut cx: init::Context) -> (Shared, Local, init::Monotonics) {
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fn init(mut cx: init::Context) -> (Shared, Local, init::Monotonics) {
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||||||
// Take ownership over the raw flash and rcc devices and convert them into the corresponding
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// Take ownership over the raw flash and rcc devices and convert them into the corresponding
|
||||||
// HAL structs
|
// HAL structs
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||||||
|
|
@ -66,7 +68,7 @@ mod app {
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||||||
let mut gpioc = cx.device.GPIOC.split();
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let mut gpioc = cx.device.GPIOC.split();
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||||||
|
|
||||||
let mut afio = cx.device.AFIO.constrain();
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let mut afio = cx.device.AFIO.constrain();
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||||||
let dma1 = cx.device.DMA1.split();
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let mut dma1 = cx.device.DMA1.split();
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||||||
|
|
||||||
// setup EXTI10 for Pin B10
|
// setup EXTI10 for Pin B10
|
||||||
let mut int_pin = gpiob.pb10.into_pull_up_input(&mut gpiob.crh);
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let mut int_pin = gpiob.pb10.into_pull_up_input(&mut gpiob.crh);
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||||||
|
|
@ -75,23 +77,33 @@ mod app {
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||||||
int_pin.trigger_on_edge(&mut cx.device.EXTI, gpio::Edge::Falling);
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int_pin.trigger_on_edge(&mut cx.device.EXTI, gpio::Edge::Falling);
|
||||||
unsafe { cx.core.NVIC.set_priority(pac::Interrupt::EXTI15_10, 1) }; // EXTI10 priority
|
unsafe { cx.core.NVIC.set_priority(pac::Interrupt::EXTI15_10, 1) }; // EXTI10 priority
|
||||||
|
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||||||
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// setup DMA1_CHANNEL4 interrupt on TransferComplete
|
||||||
|
dma1.4.listen(stm32f1xx_hal::dma::Event::TransferComplete);
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||||||
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unsafe { cx.core.NVIC.set_priority(pac::Interrupt::DMA1_CHANNEL4, 1) };
|
||||||
|
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||||||
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// Serial config
|
||||||
|
let serial = serial::Serial::new(
|
||||||
|
cx.device.USART1,
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||||||
|
(
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||||||
|
gpioa.pa9.into_alternate_open_drain(&mut gpioa.crh),
|
||||||
|
gpioa.pa10, //.into_pull_up_input(&mut gpioa.crh),
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||||||
|
),
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||||||
|
&mut afio.mapr,
|
||||||
|
serial::Config::default(),
|
||||||
|
&clocks,
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||||||
|
);
|
||||||
|
|
||||||
sender::spawn().unwrap();
|
sender::spawn().unwrap();
|
||||||
|
|
||||||
(
|
(
|
||||||
Shared {
|
Shared {
|
||||||
dmx: DMX::new(
|
buffer: singleton!(: [u8; DMX_LEN] = [0b01010101; DMX_LEN]).unwrap(),
|
||||||
cx.local.buffer,
|
|
||||||
dma1.4,
|
|
||||||
gpioa.pa9,
|
|
||||||
gpioa.pa10,
|
|
||||||
&mut gpioa.crh,
|
|
||||||
&mut afio.mapr,
|
|
||||||
&clocks,
|
|
||||||
),
|
|
||||||
|
|
||||||
// Configure timer
|
// Configure timer
|
||||||
delay_us: cx.device.TIM2.delay_us(&clocks),
|
delay_us: cx.device.TIM2.delay_us(&clocks),
|
||||||
|
|
||||||
|
dmx: DMX::new(serial, dma1.4, &clocks),
|
||||||
|
|
||||||
int_led: gpiob
|
int_led: gpiob
|
||||||
.pb0
|
.pb0
|
||||||
.into_open_drain_output_with_state(&mut gpiob.crl, gpio::PinState::Low),
|
.into_open_drain_output_with_state(&mut gpiob.crl, gpio::PinState::Low),
|
||||||
|
|
@ -103,7 +115,7 @@ mod app {
|
||||||
.pc13
|
.pc13
|
||||||
.into_push_pull_output_with_state(&mut gpioc.crh, gpio::PinState::High),
|
.into_push_pull_output_with_state(&mut gpioc.crh, gpio::PinState::High),
|
||||||
|
|
||||||
int_pin,
|
int_pin: int_pin,
|
||||||
},
|
},
|
||||||
init::Monotonics(mono),
|
init::Monotonics(mono),
|
||||||
)
|
)
|
||||||
|
|
@ -116,9 +128,9 @@ mod app {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#[task(local = [led], shared = [delay_us, dmx])]
|
#[task(local = [led], shared = [&buffer, delay_us, dmx])]
|
||||||
fn sender(mut cx: sender::Context) {
|
fn sender(mut cx: sender::Context) {
|
||||||
cx.shared.dmx.lock(DMX::start_tx);
|
cx.shared.dmx.lock(|dmx| dmx.send(cx.shared.buffer));
|
||||||
|
|
||||||
cx.local.led.toggle();
|
cx.local.led.toggle();
|
||||||
cx.shared.delay_us.lock(|d| d.delay(1.secs()));
|
cx.shared.delay_us.lock(|d| d.delay(1.secs()));
|
||||||
|
|
@ -129,7 +141,7 @@ mod app {
|
||||||
#[task(binds = DMA1_CHANNEL4, shared = [dmx, int_led])]
|
#[task(binds = DMA1_CHANNEL4, shared = [dmx, int_led])]
|
||||||
fn waiter(cx: waiter::Context) {
|
fn waiter(cx: waiter::Context) {
|
||||||
(cx.shared.dmx, cx.shared.int_led).lock(|dmx, int_led| {
|
(cx.shared.dmx, cx.shared.int_led).lock(|dmx, int_led| {
|
||||||
assert!(dmx.tx_is_idle());
|
dmx.wait();
|
||||||
int_led.toggle();
|
int_led.toggle();
|
||||||
});
|
});
|
||||||
}
|
}
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue