streamlining
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df790fcc74
commit
91139c792c
1 changed files with 11 additions and 13 deletions
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@ -9,7 +9,7 @@ mod dmx;
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// extern crate panic_halt;
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extern crate panic_semihosting;
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#[rtic::app(device = stm32f1xx_hal::pac, dispatchers = [DMA1_CHANNEL4])]
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#[rtic::app(device = stm32f1xx_hal::pac, dispatchers = [PVD])]
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mod app {
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use cortex_m::singleton;
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use stm32f1xx_hal::{gpio, pac, prelude::*, serial, timer};
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@ -24,12 +24,12 @@ mod app {
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#[shared]
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struct Shared {
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buffer: &'static mut [u8; 512],
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delay_us: timer::DelayUs<pac::TIM2>,
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}
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#[local]
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struct Local {
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dmx: DMX,
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delay_us: timer::DelayUs<pac::TIM2>,
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led: gpio::gpioc::PC13<gpio::Output>,
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}
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@ -72,17 +72,18 @@ mod app {
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&clocks,
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);
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// rtic::pend(pac::Interrupt::DMA1_CHANNEL4); // ???
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foo::spawn().unwrap();
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(
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Shared {
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buffer: singleton!(: [u8; 512] = [0b01010101; 512]).unwrap(),
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},
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Local {
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dmx: DMX::new(serial, dma1.4, &clocks),
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// Configure timer
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delay_us: cx.device.TIM2.delay_us(&clocks),
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},
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Local {
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dmx: DMX::new(serial, dma1.4, &clocks),
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// Configure gpio C pin 13 as a push-pull output. The `crh` register is passed to the function
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// in order to configure the port. For pins 0-7, crl should be passed instead.
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@ -95,19 +96,16 @@ mod app {
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#[idle]
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fn idle(_: idle::Context) -> ! {
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loop {
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cortex_m::asm::nop();
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rtic::export::wfi();
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}
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}
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#[task(local = [dmx, delay_us, led], shared = [&buffer])]
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fn foo(cx: foo::Context) {
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#[task(local = [dmx, led], shared = [&buffer, delay_us])]
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fn foo(mut cx: foo::Context) {
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cx.local.dmx.send(cx.shared.buffer);
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cx.local.led.set_low();
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cx.local.delay_us.delay(1.secs());
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cx.local.led.set_high();
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cx.local.delay_us.delay(1.secs());
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cx.local.led.toggle();
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cx.shared.delay_us.lock(|d| d.delay(1.secs()));
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cx.local.dmx.wait();
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foo::spawn().unwrap();
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